powerpc/mpc8548cds: Remove incorrect DDR_MSYNC_IN erratum define
authorBecky Bruce <[email protected]>
Wed, 13 Jul 2011 22:11:57 +0000 (17:11 -0500)
committerKumar Gala <[email protected]>
Thu, 14 Jul 2011 02:27:19 +0000 (21:27 -0500)
This erratum doesn't exist on this processor, and the workaround
spins on a non-existent register, causing boot to hang.

Signed-off-by: Becky Bruce <[email protected]>
Signed-off-by: Kumar Gala <[email protected]>
include/configs/MPC8548CDS.h

index 0c0ae0289015effbdb7bd5613eaf72568c6ab8c2..c9a0f60580f28e84be37536f002e10b4f8b48196 100644 (file)
@@ -91,7 +91,6 @@ extern unsigned long get_clock_freq(void);
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN    /* possible DLL fix needed */
 
 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER      /* DDR controller or DMA? */
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef